Today at a Glance

▸ Phase 1 of 5  ·  ~10 min

🌍 Contextualize

Yesterday's visit · today's discipline

Yesterday You Saw the Brain · Today You Wire Your Own

▸ Phase 2 of 5  ·  ~15 min

⚠️ Reframe

Synthesis is the beginning · not the end

⚠️ "It Compiles, I'm Done"

The Four-Gate Ship Checklist

▸ Phase 3 of 5  ·  ~90 min  ·  Build · three checkpoints

🛠 Assemble

Heads down · structured but yours

Build Plan — 3 Checkpoints

1. CP1 · 30 min  Core module compiles & simulates. Your top-level module elaborates, your manual TB runs, you see waveforms that match your spec. Instructor walks the room — if you're stuck >10 min, pair-debug now.
2. CP2 · 30 min  Self-checking TB covers the core · AI TB drafted. Test the contracts your design has to honor (state never overflows, output stable while busy, etc.) with directed checks. Kick off the AI TB prompt in parallel.
3. CP3 · 30 min  Synthesizes · yosys stat · placed by nextpnr. Numbers in your README. Fmax recorded. If you're here, you're on the demo rubric green path.

Hardware deploy (gate 4) can slip to Wednesday morning — but only if gates 1–3 clear today.

Suggested Build Pattern (Per Module)

// 1. Sketch ports + parameters first — no logic yet
module my_project_core #(
    parameter WIDTH        = 8,
    parameter CLKS_PER_BIT = 217
)(
    input  wire             clk, rst,
    input  wire [WIDTH-1:0] data_in,
    input  wire             start,
    output reg  [WIDTH-1:0] result,
    output reg              done
);

    // 2. Name your states next (FSMs only) — localparam, 3-block style
    localparam IDLE = 2'd0, BUSY = 2'd1, DONE_S = 2'd2;
    reg [1:0] state, nstate;

    // 3. THEN logic — the 3 always blocks from Day 7
    always @(posedge clk)  /* state register */ ;
    always @(*)            /* next-state + output logic */ ;

endmodule

Skeleton first. Logic second. Self-checking testbench third (Day 5+6 pattern: apply → wait → !== compare → PASS/FAIL). This is the order that lets you compile early and often.

🤖 AI TB — Run It in Parallel

• Fire the prompt at the start of CP2. The AI works while you write your own self-checking testbench.
• Audit it at the start of CP3. Common issues: wrong reset polarity · forgot $dumpfile · stimulus that never crosses module's actual boundary cases.
• Save: prompt.txt + tb_ai_raw.v + tb_ai_fixed.v + corrections.md. This is the AI portfolio deliverable.

If You Get Stuck — The 3-Strike Rule

1. Strike 1 (5 min): Re-read your own code aloud. Half of bugs surface here.
2. Strike 2 (5 min): Print 3 things: signal value, state value, cycle count. $display beats debugger 80% of the time.
3. Strike 3 (10 min max): Pair up. Find anyone whose project is in CP3 — they're warm enough to context-switch into yours.
4. After 20 min stuck: raise your hand. Instructor budget is finite — use it.

▸ Phase 4 of 5  ·  ~30 min  ·  PPA · AI audit · hardware

🛡 Fortify

Numbers + evidence · the demo-day rubric

The Build-Day PPA Snapshot

$ yosys -p "read_verilog *.sv; synth_ice40 -top my_project_core; stat" 2> ppa.log
$ grep -E "(Number of cells|SB_LUT4|SB_DFF)" ppa.log

$ nextpnr-ice40 --hx1k --json out.json --pcf go_board.pcf \
                --asc out.asc --freq 25 2> pnr.log
$ grep "Max frequency" pnr.log

Paste the numbers into your README:

AI TB Audit — The 4 Coverage Gaps

• Boundary values — did the TB hit 0, max, and max-1 for every input?
• Reset mid-operation — does it assert rst_n at a non-trivial cycle?
• Back-to-back — does it issue start the cycle after done?
• Illegal inputs — does it intentionally feed your DUT garbage and check graceful handling?

Hardware-on-Board — The 5-Minute Check

1. make · iceprog out.bin · the board takes the bitstream
2. Press the input · the output does the thing
3. Toggle reset · the output recovers
4. Hit it again 10x · still works

If hardware deploy slips past today, that's OK — you have Wednesday morning. What you cannot skip: gates 1, 2, 3, 5 by end-of-class today.

▸ Phase 5 of 5  ·  ~5 min  ·  Demo prep · ¡a por ello!

🔗 Transfer

Tomorrow · listen · Thursday · ship

Tomorrow + Thursday

Demo Rehearsal — Practice the 5 Minutes Tonight

Rehearsal out loud beats rehearsal in your head. Record a phone video, watch it back once, fix the worst 30 seconds.