Day 9: Memory: RAM, ROM & Block RAM¶
Week 3 · Session 9 of 16
Pre-Class Slide Decks¶
Work through the slide decks below to prepare for this session. Each deck's focus is summarized so you can see what's ahead at a glance.
Segment 1: Rom In Verilog¶
Read-only memory in Verilog — two idioms, two different hardware outcomes.
Segment 2: Ram In Verilog¶
Read-write memory: FIFOs, register files, buffers. The pattern that unlocks block RAM.
Segment 3: Ice40 Memory Resources¶
What's actually inside your Go Board's chip: 1280 LUTs + 16 EBRs = 64 Kbit of block memory.
Segment 4: Memory Applications¶
Putting memory to work: sequencers, lookup tables, character displays.
Lecture Code Examples¶
Code shown during the pre-class video. Each example is a runnable
subdirectory with its own Makefile (make sim, make stat, make prog).